AMI Model Quality Check List:

1. Does the AMI model pass the IBIS 5.0 parser with zero errors?
   (The current parser has inconsistencies with IBIS 5.0.)
2. What simulator(s) was used to test the AMI models?
3. How does the AMI model treat on-die capacitance:  C_comp or s-parameters?
4. How does the AMI model treat the package?
5. Does the AMI model include RX training behavior?
6. Is it possible to manually set equalization taps in the model?
7. Place holder for DLL checker.

Documentation:

1. When will the AMI models be available?
2. What software was used to develop the AMI models?
3. What company developed the AMI models?
4. What company designed the serializer-deserializer (serdes) circuit?
5. What company manufactured the chip?
6. What kind of equalization does the TX circuit use?
7. How many TX taps?
8. What kind of equalization does the RX circuit use?
9. How many RX taps?
10. Does the RX hardware automatically train itself?

Model-to-Hardware Correlation:

1. Does the serdes hardware have an “on-chip oscilloscope” feature, i.e. the ability to query a register that stores an eye diagram measured at the output of the RX equalizer?
2. Is a lab report available that demonstrates model-to-hardware correlation?
3. Does the lab report include receiver stressed eye test results?
4. Does the lab report include proof of industry standard compliance?
5. Will the PHY output a test pattern with an oscilloscope connected?  PRBS length?
6. Does the PHY support BIST-T mode?